Optional hardware change to increase CPU write access speed:

This change was invented in the last minute, therefore is not included
on the FX card itself... but the speed increase is worth it, so
here is what to do:

A 15cm wire has to be soldered from a pin of the FX controller chip
to a pin of U63.

To find the soldering spot on the FX card, here a small drawing.
The right pin is marked with a 'o' and a '^' below.

FX-card from below:
                                   | | | | | acelleration plug
                                   | | | | |
+-------------------------------------------+
|                                           |
|                                      #### |
|                                      #### |
|      . . . . . . . . . . .           #### |
|    . . . . . . . . . . . . .         #### |
|    . .                   . .         #### |
|    . .                   . .         #### |
|    . . Socket pins       . .         #### |
|    . .                   . .         #### |
|    . .                   . .         #### |
|    . .                   . .         #### |
|    . .                   . .         #### |
|    . .                   . .         #### |
|    . .                   . .         #### |
|    . . . . . . . . . . . . .         #### |
|      . . . o . . . . . . .           #### |
|            ^   M                     #### |
|        M       MM                    #### |
| MMMMMMMMMMMMMMMMMMMMMMM              #### |
|                MMMMMMMMMMMMMMMMMMMM       |
                 ground-connection

The wire is lead from the marked FX pin to pin 19 of
U63.

    1
 |  9  |  |  |  |  |  |  |  |  |
---------------------------------
|                               |
 ]    U63                       |
|                               |
---------------------------------
 |  |  |  |  |  |  |  |  |  |  |


Short explanation:

The Falcon logic in U63/U68 speeds down the 68030-accesses to
68000 speed, i.e. one bus cycle always lasts four clock cycles.
Through our wire this logic is circumvented and the 68030 being
told, that it can end the bus cycle. That way an FX access can last
only 3 clock cycles. That (at the moment) only happens at write
accesses, because (depending on RAM type) during read accesses correct
data could not be present at the data bus and the 68030 gets invalid
data.

Attention: Gembench's RAM-ACCESS only times read accesses (!) thereby
not noticing this accelleration. MEMSPEED.TOS is more suitable for that...



Georg Acher / BlowUP    20.11.95


